Metallizing paste for silicon carbide sintered body and a semiconductor device including the same

ABSTRACT

The metal powder composition for the metallizing paste is composed of not less than 90 wt % gold, 0.03-3.0 wt % cadmium, 0.1-2.0 wt % bismuth, 0.01-1.0 wt % copper, 0.01-2.0 wt % germanium and 0.01-1.0 wt % silicon. 
     The metallized paste bonds both the silicon carbide sintered substrate and the silicon semiconductor element with a high bonding strength.

FIELD OF THE INVENTION

The present invention relates to a novel metallizing paste for silcioncarbide sintered body and, more particlularly, to a metallizing pastesuitable for bonding semiconductor elements onto integrated circuitsubstrates made of silicon carbide sintered body and an integratedcircuit device including the same.

BACKGROUND OF THE INVENTION

A thick film hybrid integrated circuit is generally composed of elementsof conductors and resistors formed on a ceramic substrate by means ofscreen printing and firing techniques, and semiconductor elements andother electronic parts connected to the conductor or the resistorelements. As the ceramic substrate, alumina ceramics were conventionallymostly used. Recently, silicon carbide ceramics have been developedwhich have about 10 times as large heat conductivity as the aluminaceramics and a good electrical insulating properties as required for anintegrated circuit substrate.

A metallizing paste is used in order to form a thick film hybridintegrated circuit on a ceramic sintered body. The paste is required toform a metallized portion when it is fired, which has good electricalproperties, comes into close contact with the ceramic sintered body, andis wettable with solders during the bonding of the semiconductorelements, conductors and other metal connectors.

Conventionally, it is considered that a metallizing paste used for anoxide ceramic sintered body is bonded to the sintered body by a reactionof the molten glass content in the paste with the sintered body.However, the glass melt is disadvantageous in that it causes anincomplete bonding with such a system as silicon carbide sintered bodyhaving no reaction between oxides therein, and in that the glass melthinders the bonding between conductors or other metal connectors and themetallized portion.

A metallizing method and materials for forming elements such asconductors and resistors on a non-oxide ceramic sintered body aredisclosed in Japanese Patent Laid-Open Nos. 51774/1980 and 113683/1980.In these specifications, a metallizing method is proposed which includescoating a composition of a metal having a high wettability with regardto the silicon carbide and a metal having a low thermal expansioncoefficient and a high melting point such as tungsten and molybdenum tothe sintered body in the form of a paste, and firing the coatedcomposition in a non-oxidizing atmosphere. This method, however, isdisadvantageous in that a metal having a high melting point such astungsten and molybdenum is difficult to directly bond with asemiconductor element and requires a material between them which bondsto both the metal and the semiconductor element, when a thick filmintegrated circuit is formed.

SUMMARY OF THE INVENTION

Accordingly, it is an object of the present invention to provide ametallizing paste for silicon carbide sintered body which has a goodbonding with respect to both the silicon carbide ceramic sintered bodyand the semiconductor elements, and which is capable of bonding thesemiconductor elements to the silicon carbide ceramic sintered bodywithout the need for an intermediate layer.

A metallizing paste which has gold as its main constituent and containsa small amount of copper, germanium, bismuth and silicon exhibits a goodbonding with regard to both the silicon carbide ceramic sintered bodyand the semiconductor elements at an ordinary temperature and reduces athermal fatigue, but it is necessary to enhance the bonding strength inthe case of applying it to a semiconductor device requiring a highreliability. Accordingly, as a result of various researches, it has beenfound that addition of cadmium produces a good metallizing paste inwhich the bonding strength is enhanced and is not lowered due to thethermal fatigue.

A gold based metallizing paste according to the present invention has ahigh wettability and bonding strength with semiconductor elements,retains good bonding with respect to a silicon carbide ceramic sinteredbody particularly having a thermal conductivity of 0.4 cal/cm.s.°C. ormore (at a room temperature) and a thermal expansion coefficient of4×10⁻⁶ /°C. or less (at a room temperature), a good electricalinsulating property, and, in addition, the paste is superior inresistance to thermal fatigue.

A metallizing paste according to the present invention is characterizedin that mixed powder, the main constituent of which is powder of goldand which contains a small amount of cadmium, and further preferably atleast one selected from the group consisting of bismuth and copper, or asmall amount of germanium, is dispersed uniformly in an organic bindersolution. The metallizing paste of the present invention optinally maycontain silicon.

The present invention is based on the discovery that the addition ofcadmium enhances the bonding strength with silicon carbide ceramicsintered body, and increases resistance to thermal fatigue. In thepresent invention, cadmium powder, as well as copper and bismuth powder,fuses with the silicon oxide film formed in advance on the surface of asilicon carbide ceramic sintered body and vitrifies at the time offiring, thereby bonding fast the interface between the ceramic and thegold metallized portion. Germanium powder increases the wettability withsilicon at the time of bonding the silicon elements and strengthens thebonding. Silicon may be added to the above-described paste composition.Addition of the silicon is advantageous in enhancing the wettabilitywith respect to the semiconductor elements and suppressing thedeterioration of the properties due to thermal fatigue after bonding.

The metal powder composition of the metallizing paste according to thepresent invention essentially is composed of not less than 90 wt %,preferably 99.87 to 93 wt % gold, which is the main constituent, and0.01 to 2.0 wt %, preferably 0.05 to 1.0 wt % cadmium, and furtherpreferably composed of at least one selected from the group consistingof 0.01 to 2.0 wt % bismuth, 0.01 to 2.0 wt % germanium and 0.01 to 1.0wt % copper. The metal powder may contain 0.01 to 1.0 wt % silicon. Theabove-described contents of copper, germanium and cadmium are preferablefor improving the bonding with the silcion carbide ceramic sintered bodyand the formation of a thick film. Copper improves bonding with thesemiconductor elements, germanium improves the bonding with the sinteredbody and cadmium improves the bonding with the sintered body and servesfor a better formation of a thick film.

The particle size of the metal powder used for the present invention isabout 5 μm or less, and the finer the particle, the better, but powderhaving a particle size of about 0.005 to 5 μm is sufficient.

As an organic binder in the present invention, a compound which easilydecomposes and volatiles completely under the firing condition, forexample a cellulose derivative such as ethylcellulose andnitrocellolose, and a polymer such as methacrylic acid ester and acrylicaicd ester is used. Furthermore, in the present invention, an organicsolvent which dissolves the binder and wets the above-described metalpowder is used. Glycol ether ester, ketone and terpineol are examplesfor the organic solvent.

A mixing amount of the organic binder and the solvent is selected withdue consideration of necessary working ease in the steps from printingthe paste to firing thereof, and, for example, 1 to 15 parts by weightof ethylcellulose and 100 parts by weight of terpineol are mixed with100 parts by weight of the metal powder composition. A method ofpreparing the paste is not restricted and a uniform dispersed body isobtained through a conventional equipment by mulling the metal powersmixed in advance and the organic binder solution, or by adding andmixing metal powers into the organic binder solution. The powder ispreferably composed of 0.1 to 2.0 wt % Bi, 0.01 to 2.0 wt % Ge, 0.01 to1.0 wt % Cu, 0.03 to 2.0 wt % Cd and the balance Au, or further composedof 0.01 to 1.0 wt % Si.

A metallizing paste according to the present invention is applied to asilicon carbide ceramic sintered body by a known technique and is fired.The firing is preferably conducted at a temperature of 750° C. to 950°C., which is lower than the melting temperature of gold, more preferably830° to 880° C., in compressed air. The firing of the paste in theoxidizing atmospheres contributes to form an Au metallized layer of ahigh bonding strength more than 1.5 kg/5 mm in peel strength, whereinthe cadmium in the paste oxidized into cadmium oxide at the interfacewith the sintered body and which reacts with the silicon oxide likelyformed at the interface between the silicon carbide ceramic sinteredbody and the paste and strengthens the bonding. A small amount of oxideremaining in the Au metallized layer does not cause any substantialadverse effects to the bonding strength thereof. The other additives,that is, bismuth and copper also react with the silicon oxide andstrengthen the bonding.

A metallizing paste in accordance with the present invention isapplicable not only to formation of a thick film hybrid integratedcircuit but also to binders for structural portions of machines.

A silicon carbide sintered body is preferably an electrical insulatingsintered body containing Be, a Be compound or BN, and preferably has aresistivity of 10¹⁰ Ω cm or more and a thermal conductivity of 0.2cal/cm sec °C. or more at a room temperature. Especially, the sinteredbody preferably contains 0.1 to 3.5 wt % Be or Be compound based on Becontent.

A theoretical density of the silicon carbide ceramic sintered body is tobe more than 90%, preferably more than 98%.

A semiconduetor package of the present invention comprising asemiconductor element disposed on a substrate made of an electricalinsulating silicon carbide sintered body; a spacer disposed on thesubstrate and surrounding the semiconductor element; a lead framearranged on the spacer; a fine wire electrically connecting thesemiconductor element and the lead frame; a flange arranged on the leadframe; and a cap arranged on the flange so as to seal the semiconductorelement: characterized in that the semiconductor element is bonded tothe substrate by a metallized layer containing gold as it's mainconstituent and a small amount of cadmium.

A semiconductor module of the present invention comprising asemiconductor element, a thick film resistance element, a capacitanceelement, and a thick film electrical conductor disposed respectively ona substrate made of an electrical insulating silicon carbide sinteredbody; and a fine metal wire electrically connecting the semiconductor,thick film resistance and capacitance elements and the thick filmelectrical conductor: characterized in that the semiconductor element isbonded to the substrate by a metallized layer containing gold as it'smain constituent and a small amount of cadmium.

A semiconductor package of the present invention comprising asemiconductor element and a lead frame disposed on a substrate made ofan electrical insulating silicon carbide sintered body; a fine metalwire electrically connecting the semiconductor element and the leadframe; and a cap arranged on the lead frame so as to cover and seal thesemiconductor element therein: characterized in that the semiconductorelement is bonded to the substrate by a metallized layer containing goldas it's main constituent and a small amount of cadmium, thesemiconductor package of the present invention is further characterizedin that a comb shaped heat radiation fin is formed integrally on theother side of the substrate where the semiconductor element is notdisposed, the semiconductor package of the present invention is stillfurther characterized in that a heat sink with metal heat radiation finsis bonded through a resin on the other side of the substrate where thesemiconductor element is not disposed.

A pin grid alley semiconductor device of the present inventioncomprising a semiconductor element disposed on a substrate made of anelectrical insulating silicon carbide sintered body; a wiring substratedisposed on the substrate and surrounding the semiconductor element; ametal wire electrically connecting the semiconductor element and aterminal provided on the wiring substrate; a cap arranged on the wiringsubstrate so as to cover and seal the semiconductor element; and a pinfor electrical connection arranged on the other side of the wiringsubstrate not facing to the substrate for the semiconductor element:characterized in that the semiconductor element is bonded to thesubstrate by a metallized layer containing gold as it's main constituentand a small amount of cadmium, the pin grid alley semiconductor deviceof the present invention is further characterized in that the wiringsubstrate is a multilayered board made of ceramic sintered body oneselected from the group consisting of alumina, mullite based and silicaglass based sintered body.

A semiconductor device of the present invention comprising asemiconductor element disposed on a substrate made of an electricalinsulating silicon carbide sintered body characterized in that thesemiconductor element is bonded to the substrate by a metallized layercontaining gold as it's main constituent and a small amount of cadmium,and an oxide layer of cadmium and silicon is formed at the interfacebetween the substrate and the metallized layer, and furthercharacterized in that the metallized layer is essentially composed ofnot less than 90 wt % gold and 0.03-3.0 wt % cadmium, preferably 0.1 wt% cadmium.

A semiconductor device of the present invention comprising asemiconductor element disposed on a substrate made of an electricalinsulating silicon carbide sintered body characterized in that thesemiconductor element is bonded to the substrate by a metallizing layercontaining gold as it's main constituent, a small amount of cadmium andat least one selected from the group consisting of a small amount ofbismuth, copper, germanium and silicon and an oxide layer of cadmium andsilicon is formed at the interface between the substrate and themetallized layer, and further characterized in that the metallized layeris essentially composed of not less than 90 wt % gold, 0.03-3.0 wt %cadmium and at least one selected from the group consisting of 0.1-2.0wt % bismuth, 0.01-1.0 wt % copper, 0.01-2.0 wt % germanium and 0.01-1.0wt % silicon, and still futher characterized in that the metallizedlayer is essentially composed of not less than 90 wt % gold, 0.03-3.0 wt% cadminum, 0.1-2.0 wt % bismuth, and 0.01-1.0 wt % copper, preferablynot less than 90 wt % gold, 0.03-3.0 wt % cadmium, 0.1-2.0 wt % bismuth,0.01-1.0 wt % copper and 0.01-2.0 wt % germanium.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a graph illustrating bonding strengths of metallized layersin relation to the amount of copper, bismuth or cadmium in gold basedbonding pastes of the present invention and comparative examples.

FIG. 2 is a sectional view of one empodyment of a semiconductor packageincluding a silicon carbide sintered substrate using a metallizing pasteaccording to the present invention.

FIG. 3 is a sectional view of one embodyment of a semiconductor moduleincluding a silicon carbide sintered substrate using a metallizing pasteaccording to the present invention.

FIG. 4 is a sectinal view of one embodyment of a logic LSI packageincluding a silicon carbide sintered substrate using a metallizing pasteaccording to the present invention.

FIG. 5 is a sectional view of another embodyment of a logic LSI packageincluding a silicon carbide sintered substrated using a metallizingpaste according to the present invention.

FIG. 6 is a sectional view of still further embodiment of a logic LSIpackage including a silicon carbide sintered substrate using ametallizing paste according to the present invention.

FIG. 7 is a sectional view of one embodyment of a pin grid alleysemiconductor device including a silicon carbide sintered substrateusing a metallizing paste according to the present invention.

EMBODIMENT 1

Powder metal components of a particle diameter of about 1 μm forrespective metallizing paste compositions as shown in Table 1 areweighed out and mixed by a V-type mixer.

                  TABLE 1                                                         ______________________________________                                                Composition (wt %)                                                            No.   Au      Cu     Ge   Bi   Si   Cd                                ______________________________________                                        Embodiments                                                                             1       98.4    0.1  0.3  1.0  --   0.2                                       2       98.1    0.1  0.3  1.0  --   0.5                                       3       98.8    0.2  0.3  0.5  --   0.2                                       4       98.5    0.2  0.3  0.5  0.3  0.2                             Comparative                                                                             5       98.5    0.1  0.3  1.0  0.1  --                              Examples  6       98.7    0.2  0.3  1.0  0.5  --                                        7       98.6    0.1  0.3  1.0  --   --                                        8       99.0    0.2  0.3  0.5  --   --                                        9       99.6    0.1  0.3  --   --   --                                        10      99.4    0.3  0.3  --   --   --                                        11      99.2    0.5  0.3  --   --   --                                        12      99.1    0.1  0.3  0.5  --   --                              ______________________________________                                    

Terpineol solution which contains ethyl cellulose of a concentration of5 wt % as an organic binder is added to the metal powder mixture in theproportion of 100 parts by weight of the metal content to 20 parts byweight of terpinelo, and they are mulled to prepare a slurry metallizingpaste.

The metallizing paste is next screen printed on a silicon carbidesintered ceramic substrate containing 2 wt % beryllia and having atheoretical density of 99% and degreased and washed in advance, heatedand dried in an atmosphere at 120° C. for 15 minutes, and thereafterfired at 800° to 870° C. for 9 minutes.

The sample prepared in this way was examined in the following method inorder to evaluate the bonding state between the metallized portion andthe substrate.

The metallized portion of 7 mm square and 12 μm in thickness was formedon the above silicon carbide ceramic substrate of 21.6 mm square and 0.6mm in thickness. A copper belt of 5 mm in width and 0.2 mm in thicknesswas bonded to the metallized portion by the solder of an indium alloycontaining 50% by weight of lead. When soldering, the lead-indium alloywas heated and fused in a solder pan to 230° to 250° C. in advance, themetallized portion with the copper belt overlaid was immersed in thesolder pan for 2 to 3 seconds for bonding. The test piece was loaded ona tensile tester by means of a jig while fixing the substrate and thebonding strength (kg) at 5 mm width was measured by peeling themetallized portion out of the substrate by pulling one end of the copperbelt. The results are shown in Table 2 as a. In order to examine thebonding state between the metallized portion and the substrate under athermal fatigue, a thermal shock test and a heat cycle test wereconducted under the following conditions and the bonding strength of thetest pieces after the tests was measured.

In the thermal shock test, the test piece was heated to 200° C. on apreheated heating block, immediately thereafter, it was put into icewater (0° C.) and retained for 5 minutes, and was again placed on theheating block. This cycle was repeated 5 times.

In the heat cycle test, the test piece was maintained for 25 minutes ina bath in which the temperature was set at -55° C., was left to stand ata room temperature for 5 minutes, maintained for 25 minutes in aconstant temperature bath of 150° C., and was left to stand at a roomtemperature for 5 minutes. The test piece was subjected to 100 cycles ofthis heat cycle test.

The bonding strength (kg) of the test piece after exposure to thethermal fatigue was measured by peeling the bonding between themetallized portion and the substrate through the method explained above.The results are shown in Table 2 as b and c, respectively. On thecomparative examples, the bonding strengths were measured in the sameway as explained. In Table 2, a denotes the data of the test pieceimmediately after firing, b those of the test piece after the thermalshock test, and c those of the test piece after the heat cycle test.

An oxide layer of at least cadmium and silicon of below 10 μm inthickness was formed at the interface between the silicon carbidesintered substrate and the metallized layer.

As seen from Table 2, the peel strength (a) of the metallized layerimediately after firing according to the preseut invention showed morethan 1.9 kg. On the other hand the peel strength (a) of the metallizedlayer of the comparative examples showed 1.2 kg at the maximum.

Further as seen from FIG. 1, the metallized layer using the metallizingpaste containing more than 0.05 wt % cadmium according to the presentinvention shows a high bonding strength more than 1.5 kg, which isunderstood that the addition of cadmium into the gold based metallizingpaste extremely improve the bonding strength of the metallized layer.

Still further, the inventors confirmed that a sole addition of cadniumto the gold based metallizing paste also increases the bonding strengthof the metallized layer although which is not indicated in Table 2.

The bonding of the metallized portion with a semiconductor element wasevaluated by the following method.

A silicon semiconductor element (5.0 mm×5.0 mm in bottom size) wasplaced on the metallized portion (7 mm×7 mm in size, and 12 μm inthickness) formed on a silicon carbide ceramic substrate, which wasplaced on a heater to be heated to about 430° C. Nitrogen gas which washeated to about 390° C. was blown onto the substrate to isolate thesubstrate from the surroundings. In this atmosphere, the element waspressed against the substrate, and bonded to the metallized portionthrough a formation of an Au-Si alloy.

A test piece was formed by adhering a 3 mmφ nut and bolt to thesemiconductor element which was bonded to the metallized portion usingan epoxy resin. The test piece was loaded on a tensile tester by a jigwhile fixing the substrate and the bonding strength (kg) between themetallized portion and the semiconductor element was measured. Theresults are shown in Table 3. a denotes the data of the test pieceimediately afte the semiconductor was bonded to the metallized portion.On the comparative examples the same bonding strength was measured andillustrated in Table 3. To examine the bonding state of the test pieceafter exposed in a thermal fatigue, a thermal shock test and a heatcycle test were conducted. Both tests were conducted in the same methodsas described above, and the bonding strength (kg) between the metallizedportion and the semiconductor of the test pieces was measured in thesame method as explained above. The results are shown in Table 3 as band c. In Table 3, b shows the data after the thermal shock test and cthe data after the heat cycle test. On the comparative examples the samebonding strengths were measured and illustrated in Table 3.

EMBODIMENT 2

Application examples to a semiconductor device employing the electricalinsulating silicon carbide sintered body as it's substrate whichincludes the metallized layer formed thereon by using the gold basedmetallizing paste according to the present invention will be explainedin the following.

                  TABLE 2                                                         ______________________________________                                                   Bonding strength                                                              No.  a          b      c                                           ______________________________________                                        Enbodiments  1      2.1        1.75 1.9                                                    2      2.3        2.05 2.0                                                    3      2.0        1.7  1.7                                                    4      1.9        1.6  1.8                                       Comparative  5      0.9        1.1  1.0                                       Examples     6      1.0        1.6  1.5                                                    7      0.8        0.6  1.0                                                    8      0.85       0.8  0.75                                                   9      1.1        --   --                                                     10     1.2        --   --                                                     11     1.2        --   --                                                     12     0.7        --   --                                        ______________________________________                                    

                  TABLE 3                                                         ______________________________________                                                    Bonding strength                                                              No.  a          b     c                                           ______________________________________                                        Enbodiments   1      7.2        5.0 6.0                                                     2      8.4        7.2 7.6                                                     3      7.4        6.4 7.0                                                     4      8.0        7.0 7.2                                       Comparative   5      1.8        1.5 1.7                                       Examples      6      1.6        2.4 2.8                                                     7      1.4        1.1 1.2                                                     8      0.7        0.6 0.6                                       ______________________________________                                    

FIG. 2 is a sectional view of a semiconductor package formed by usingthe gold based metallizing paste according to the present invention.This semiconductor device is fabricated, by forming the metallized layer11 on the substrate 10 of the silicon carbide sintered body described inEmbodiment 1 by firing it at a temperature of 850° C. in an atmosphereusing the paste No. 2 shown in Table 1, and bonding the siliconsemiconductor element 12 directly onto the metallized layer 11. A flange25, lead frame 18, a spacer 26 and the silicon carbide sintered bodysubstrate 10 are respectively bonded by glasses 19 having a thermalexpansion coefficient of 40 to 55×10⁻⁷ /°C. and sealed. The flange andthe spacer are preferably made of a ceramic sintered body having athermal expansion coefficient of 40 to 55×10⁻⁷ /°C., and, for example,Zircon sintered body (ZrO₂ ·SiO₂) is preferable. The cap 20 and theflange 25 are bonded by the solder 16. Kovar (30 wt % Ni-17 wt % Co-Fealloy) or 42 alloy (42 wt % Ni-Fe alloy) is used for the cap 20. Thereference numeral 13 represents a bonding wire. Au, Cu or Al ispreferable as the wire.

FIG. 3 is a sectional view of a semiconductor igniter module. Thissemiconductor device is fabricated by forming a metallized layer 11 on asubstrate 10 of the electrical insulating silicon carbide sintered bodydescribed in Embodiment 1 by firing it at a temperature of 850° C. in anatmosphere using the paste No. 2 shown in Table 1. A silicon pellet 12is disposed on the metallized layer 11 and bonded thereto by pressingthe pellet 12. A capacitor 17 is directly bonded to a thick filmconductor 14 by a solder 16. The reference numeral 15 denotes a thickfilm resistor and 13 a bonding wire. This wire is preferably made of Al.

FIG. 4 is a sectional view of one embodiment of a logic LSI packagewithout a heat radiation fin formed by using the gold based metallizingpaste according to the present invention. In the same way as describedbefore, the metallized layer 11 using the paste No. 2 shown in Table 1is formed on the substrate 10 of silicon carbide sintered body. Asilicon semiconductor element 12 is directly bonded to the metallizedlayer 11 in the same way as described in Embodiment 1. A lead frame 18and the substrate 10 and a cap 20 are bonded by glass 19 having athermal expansion coefficient of 55×10⁻⁷ /°C. and sealed. Ceramics areused for the cap 20.

FIG. 5 is a sectional view of another embodiment of logic LSI packagewhich is provided with a heat radiation fin made of the electricalinsulating silicon carbide sintered body. The metallized layer 11 usingpaste No. 2 shown in Table 1 is provided on the silicon cabide sinteredbody with the heat radiation fin 21 and an silicon carbide semiconductorelememt 12 is directely bonded thereon. A lead frame 18, and the siliconcarbide sintered substrate with the heat radiation fin 21 and a cap 20are respectively sealed by glass having a thermal expansion coefficientof 40 to 55×10⁻⁷ /°C. The cap 20 is preferably made of ceramics and thebonding wire is preferably made of Al.

FIG. 6 is a sectional view of still another embodyment of a logic LSIpackage formed by using the gold based metallizing paste according tothe present invention, which is provided with a heat sink 23 made of Al.This example is the same as that shown in FIG. 5 except that the heatsink 23 is bonded to the substrate 10 of the silicon carbide sinteredbody by a resin 24.

FIG. 7 is a sectional view of one embodyment of a pin grid alleysemiconductor device including a silicon carbide sintered substrateusing a metallizing paste according to the present invention. A ceramicmultilayered wiring board 1 together with a silicon semiconductorelement 12 are disposed on the substrate 10 made of electricalinsulating silicon carbide sintered body. The silicon semiconductorelement 12 is bonded to the substrate 10 through a metallized layer 11formed by using the paste No. 2 shown in Table 1. The siliconsemiconductor element 12 is connected to the ceramic multilayered wiringboard 1 through a fine wire 13. The multilayered wiring board isprovided with metal pins 2 for external connection, preferably made ofceramic sintered body one selected from the group consisting of alumina,mullite based and silica glass based sintered body, and bonded to thesubstrate 10 by a solder 3 by forming metallized layers on respectivefacing surfaces.

According to the present invention, since cadmium is mixed in the pasteand a cadmium oxide layer is formed at the interfaces between themetallized layer and the silicon carbide sintered substrate and thesilicon semiconductor element, whereby the bonding between themetallized layer and a semiconductor element is effectively strengthenedand deterioration of the properties of the metallized layer due tothermal fatigue after bonding to the semiconductor is restrained.Furthermore, the metallizing paste according to the present inventionwhich has gold as the main constituent and contains cadmium, bismuth,copper and germanium is very useful for forming a thick film hybridintegrated circuit using silicon carbide sintered ceramic body as itssubstrate.

We claim:
 1. A metallizing paste for silicon carbide sintered bodyessentially composed of:mixed powder which has powder of gold as themain constituent thereof and a small amount of cadmium; and an organicbinder solution in which said mixed powder is uniformly dispersed. 2.The metallizing paste for silicon carbide sintered body according toclaim 1, wherein said mixed powder is essentially composed of not lessthan 90 wt % gold and 0.03-3.0 wt % cadmium.
 3. A metallizing paste forsilicon carbide sintered body essentially composed ofmixed powder whichhas powder of gold as the main constituent thereof and further containsa small amount of cadmium, a small amount of bismuth, a small amount ofcopper and a small amount of germanium; and an organic binder solutionin which said mixed powder is uniformly dispersed.
 4. A metallizingpaste for silicon carbide sintered body according to claim 3, whereinsaid mixed powder is essentially composed of not less, than 90 wt %gold, 0.03 to 3.0 wt % cadmium, 0.1 to
 20. wt % bismuth and 0.01 to 1.0wt % copper.
 5. A metallizing paste for silicon carbide sintered bodyaccording to claim 3, wherein said mixed powder is essentially composedof not less than 90 wt % gold, 0.03 to 2.0 wt % cadmium. 0.1 to 2.0 wt %bismuth, 0.01 to 1.0 wt % copper and 0.01 to 2.0 wt % germanium.
 6. Ametallizing paste for silicon carbide sintered body comprising:mixedpowder which has powder of gold as the main constituent thereof andcontains a small amount of cadmium, a small amount of bismuth, a smallamount of copper, a small amount of germanium, and a small amount ofsilicon; and an organic binder solution in which said mixed powder isuniformly dispersed.
 7. A metallizig paste for silicon carbide sinteredbody according to claim 6, wherein said mixed powder is composed of notless than 90 wt % gold, 0.03 to 2.0 wt % cadmium, 0.1 to 2.0 wt %bismuth, 0.01 to 2.0 wt % germanium 0.01 to 1.0 wt % copper, and 0.01 to1.0 wt % silicon.
 8. A semiconductor package comprising a semiconductorelement (12) disposed on a substrate (10) made of an electricalinsulating silicon carbide sintered body; a spacer (26) disposed on saidsubstrate (10) and surrounding semiconductor element (12); a lead frame(18) arranged on said spacer (26); a fine wire (13) electricallyconnecting said semiconductor element (12) and said lead frame (18); aflange (25) arranged on said lead frame (18); and a cap (20) arranged onsaid flange (25) so as to seal said semiconductor element (12):characterized in that said semiconductor element (12) is bonded to saidsubstrate (10) by a metallized layer (11) containing gold as it's mainconstituent and a small amount of cadmium.
 9. A semiconductor modulecomprising a semiconductor element (12) a thick film resistance element(15), a capacitance element (17) and a thick film electrical conductor(14) disposed respectively on a substrate made of an electricalinsulating silicon carbide sintered body; and a fine metal wire (13)electrically connecting said semiconductor; thick film resistance andcapacitance elements (12, 15, 17) and said thick film electricalconductor (14): characterized in that said semiconductor element (12) isbonded to said substrate (10) by a metallized layer (11) containing goldas it's main constituent and a small amount of cadmium.
 10. Asemiconductor package comprising a semiconductor element (12) and a leadframe (18) disposed on a substrate (10) made of an electrical insulatingsilicon carbide sintered body; a fine metal wire (13) electricallyconnecting said semiconductor element (12) and said lead frame (18); anda cap (20) arranged on said lead frame (18) so as to cover and seal saidsemiconductor element (12) therein: characterized in that saidsemiconductor element (12) is bonded to said substrate (10) by ametallized layer (11) containing gold as its main constituent and asmall amount of cadmium.
 11. The semiconductor package according toclaim 10 further characterized in that a comb shaped heat radiation fin(21) is formed integrally on the other side of said substrate (10) wheresaid semiconductor element (12) is not disposed.
 12. The semiconductorpackage according to claim 10 further characterized in that a heat sink(23) with metal heat radiation fins is bonded through a resin (24) onthe other side of said substrate (10) where said semiconductor element(12) is not disposed.
 13. A pin grid alley semiconductor devicecomprising a semiconductor element (12) disposed on a substrate (10)made of an electrical insulating silicon carbide sintered body; a wiringsubstrate (1) disposed on said substrate (10) and surrounding saidsemiconductor element (12) a metal wire (13) electrically connectingsaid semiconductor element (12) and a terminal provided on said wiringsubstrate (1); a cap arranged on said wiring substrate so as to coverand seal said semiconductor element (12); and a pin (2) for electricalconnection arranged on the other side of said wiring substrate (1) notfacing to said substrate (10) for said semiconductor element (12):characterized in that said semiconductor element (12) is bonded to saidsubstrate (10) by a metallized layer (11) containing gold as its mainconstituent and a small amount of cadmium.
 14. The pin grid alleysemiconductor device according to claim 13 further characterized in thatsaid wiring substrate (1) is a multilayered board made of ceramicsintered body one selected from the group consisting of alumina, mullitebased and silica glass based sintered body.
 15. A semiconductor devicecomprising a semiconductor element disposed on a substrate made of anelectrical insulating silicon carbide sintered body characterized inthat said semiconductor element is bonded to said substrate by ametallized layer containing gold as it's main constituent and a smallamount of cadmium, and an oxide layer of cadmium and silicon is formedat the interface between said substrate and said metallized layer. 16.The semiconductor device according to claim 15; characterized in thatthe metallized layer is essentially composed of not less than 90 wt %gold and 0.03-3.0 wt % cadmium.
 17. A semiconductor device comprising asemiconductor element disposed on a substrate made of an electricalinsulating silicon carbide sintered body characterized in that saidsemiconductor element is bonded to said substrate by a metallized layercontaining gold as it's main constituent, a small amount of cadmium andat least one selected from the group consisting of a small amount ofbismuth, copper, germanium and silicon and an oxide layer of cadmium andsilicon is formed at the interface between said substrate and saidmetallized layer.
 18. The semiconductor device according to claim 17,further characterized in that said metallized layer is essentiallycomposed of not less than 90 wt % gold, 0.03-3.0 wt % cadmium and atleast one selected from the group consisting of 0.1-2.0 wt % bismuth,0.01-1.0 wt % copper, 0.01-2.0 wt % germanium and 0.01-1.0 wt % silicon.19. The semiconductor device according to claim 17 further characterizedin that said metallized layer is essentially composed of not less than90 wt % gold, 0.03-3.0% cadnium, 0.1-2.0 wt % bismuth and 0.01-1.0 wt %copper.
 20. The semiconductor device according to claim 17 furthercharacterized in that said metallized layer is essentially composed ofnot less than 90 wt % gold, 0.03-2.0 wt % cadimium, 0.1-2.0 wt %bismuth, 0.01-1.0 wt % copper and 0.01-2.0 wt % germanium.